1. Field of the Invention
The present invention relates to an image data output apparatus, and more particularly to an image data output apparatus for sequentially outputting one after another a plurality of pixel data stored in a memory. More specifically, the present invention relates to an image data output apparatus wherein: a plurality of read clock signals from the timing pulse generator are sequentially applied one after another to a plurality of memories to read each one of a plurality of pixel data corresponding to a plurality of pixels constituting an image; a plurality of read-out pixel data are applied to latch circuits to latch them upon application of latch signals from the timing pulse generator to the latch circuits; and a plurality of latched pixel data are applied to a data selector to serially output the plurality of latched pixel data therefrom upon application of data selector signals from the timing selector to the data selector.
2. Related Background Art
According to a conventional technique, the following processing has been performed: An image is divided, for example, into m rows in the horizontal direction and n columns in the vertical direction to obtain a plurality of pixel groups. Each pixel group has i pixels, and i memories corrsponding in number to that of the pixels included in a pixel group are provided. Each of the i pixels is converted into one bit (binary) image data for example. The i image pixel data are called a unit. Each pixel data in a unit is stored in a corresponding one of the i memories. In reproducing an image, i pixel data constituting a first unit are first read out of the i memories. The read-out i pixel data are serially outputted one after another. Subsequently, the pixel data in second and third units are subjected to similar processing as above, to thereby serially output all of the pixel data one after another. In accordance with the pixel data serially outputted one after another, an image is reproduced and displayed on a CRT, for example.
FIG. 5 shows an image data output apparatus to be used for the above-described processing to output pixel data one after another. In this apparatus, i is assumed to be "4". Thus, four memories 1 to 4 are provided together with a timing pulse generator 5, a latch circuit 6 and a data selector 7 from which pixel data are serially outputted one after another. Particularly, the timing pulse generator 5 generates a read clock signal R as shown in FIG. 6(A) to supply it to the memories 1 to 4. The pixel data are accordingly outputted from the memories 1 to 4 at the leading edge of the read clock signal R the pixel data being outputted thereafter from the data selector 7. The pixel data read from the memories 1 to 4 are as shown in FIGS. 6(B) to 6(E). In the Figures, Mx,y corresponds to a pixel data of the y-th data in a memory x.
The pixel data read out of the memories 1 to 4 are supplied to the latch circuit 6 and latched at the leading edge of a latch signal L shown in FIG. 6(F). The latched pixel data are supplied to the data selector 7 which selectively and sequentially outputs the latched pixel data one after another. A select signal S supplied from the timing pulse generator 5 as shown in FIG. 6(G) determines from which memory a pixel data is outputted. When select signal S shown in FIG. 6(G) is supplied, the data selector 7 outputs pixel data D at the timings shown in FIG. 6(H).
With the above mentioned apparatus, however, if the frequency of the read clock signal R becomes high and the read timings become high speed, then the time from the leading edge of the latch signal L to the time when the output data form the latch circuit 6 becomes definite, i.e., the time period during which the output data is indefinite, becomes non-negligible as compared to the output time required for one pixel data. Thus, the processing capability of the data selector 7 cannot follow it. Consequently, if the read timings of the conventional apparatus become high speed, pixel data which should not be outputted are outputted, resulting in a poor reproduced image.